The invention pertains to a method of attaching a self-aligned contact in the direct proximity of an electrode layer of polycrystalline silicon. Such a method is known from DE-A1-32 43 059 and is of particular significance with respect to integrated bipolar transistors for use with highest-frequency circuits.
In the method as disclosed in the aforementioned German Offenlegungsschrift, for the electrode layer as well as for the contact a polycrystalline silicon is used for the emitter electrode layer as well as for the base contact which is doped in accordance with the conductivity type of the regions to be contacted and is used as a source of diffusion and as a contacting material as well. The emitter electrode layer is aligned to the emitter region, and the base contact is aligned to the outer inactive base region. Thus, the mutual alignment of the individual contacts to the respective region to be contacted is not subjected to the alignment tolerances of a photolithographic process. In fact, in this conventional method a uniform edge isolation of the base contact from the emitter electrode is achieved by employing a special dry etching process, so that the contacts with their regions are also self-aligned in relation to one another. The special dry etching process comprises the steps of reactive ion etching in a gas atmosphere composed of a mixture of SF.sub.6, inert gas and oxygen, the relative constituent proportions of the mixture being adjusted in different amounts according to the layer to be etched.
Such a self-alignment is also achieved with the so-called "SST"-structures as disclosed in pages 155 to 159 in Vol. 20 (1981) Suppl. 20-1 of the "Japanese Journal of Applied Physics" and is based on the establishment of the edge isolation by employing a thermal oxidation of the polycrystalline silicon. In this process an N+ emitter region, a base p region, a p+ base region, a base p+ polysilicon electrode and the spacing between the emitter n+ region and base contact are formed by one mask process. The processes for forming the transistor active region are all self-aligned.
The aforementioned methods have the disadvantage of restricting the material of both the electrode layer and the contact to polycrystalline silicon. Another essential disadvantage is that an overlapping of both the electrode layer and the contact is unavoidable. Such an overlapping, however, is the cause of an increased emitter-base capacity in the case of integrated high frequency circuits which contain such bipolar transistors as are disclosed in the aforementioned prior publications.